Conventional nonvolatile memory cells, such as OTP, EPROM, flash memory, or even PCM, are designed and in fact usually optimized to retain their data not only at ambient storage condition, but also during other device operations, including at data accessing conditions. That is, a read operation, or a data accessing operation, is typically performed under very benign biasing conditions to avoid any inadvertent change to the stored data. For example, in a typical floating gate nonvolatile memory cell, typically electrons that have been injected unto the floating gate (from a channel created between a source and drain region of the cell) are used as the stored data. The presence or absence of electrons on the floating gate defines a logic value corresponding to either a “1” state or a “0” state, or vice versa.
The cells are engineered so that these electrons are retained on the floating gate during either the idle/quiescent storage conditions or during the read operations. Read operations implemented by conventional flash memory controllers are designed such that no additional electrons are either injected unto the floating gate, or taken out of the floating gate. This way, the integrity of the stored data is preserved with data accessing operations. See e.g., US Publication No 2013/0346805 incorporated by reference herein. This feature of “access” non-volatility is highly desirable in applications where the same storage data is accessed many times, such as the case of stored program codes or other frequently accessed data which is not intended to be changed. However, there is a need in the art for memory devices that can service other applications in which continued access to data is not necessary, or in fact, is undesirable.